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19-3444; Rev 0; 10/04
+5V Multiprotocol, 3Tx/3Rx, SoftwareSelectable Clock/Data Transceivers
General Description
The MXL1543B is a three-driver/three-receiver multiprotocol transceiver that operates from a +5V single supply. The MXL1543B, along with the MXL1544/MAX3175 and the MXL1344A, form a complete software-selectable data terminal equipment (DTE) or data communication equipment (DCE) interface port that supports the V.28 (RS-232), V.10/V.11 (RS-449/V.36, EIA-530, EIA530A, X.21), and V.35 protocols. The MXL1543B transceivers carry the high-speed clock and data signals while the MXL1544/MAX3175 carry the control signals. The MXL1543B can be terminated by the MXL1344A software-selectable resistor termination network or by discrete termination networks. An internal charge pump and a proprietary low-dropout transmitter output stage allow V.11- , V.28- , and V.35compliant operation from a +5V single supply. A nocable mode is entered when all mode pins (M0, M1, and M2) are pulled high or left unconnected. In nocable mode, supply current decreases to 0.5A and all transmitter and receiver outputs are disabled (high impedance). Short-circuit current limiting and thermal shutdown circuitry protect the drivers against excessive power dissipation.
Features
MXL1543B, MXL1544/MAX3175, and MXL1344A Chipset Is Pin Compatible with LTC1543, LTC1544, and LTC1344A Supports RS-232, RS-449, EIA-530, EIA-530A, V.35, V.36, and X.21 Software-Selectable Cable Termination Using the MXL1344A Complete DTE or DCE Port with MXL1544/ MAX3175, and MXL1344A +5V Single-Supply Operation 0.5A No-Cable Mode TUV-Certified NET1/NET2 and TBR1/TBR2Compliant
MXL1543B
Ordering Information
PART MXL1543BCAI TEMP RANGE 0 to +70C PIN-PACKAGE 28 SSOP
Applications
Data Networking CSU and DSU Data Routers PCI Cards Telecommunications Equipment
Pin Configuration appears at end of data sheet.
Typical Operating Circuit
LL CTS DSR DCD DTR RTS RXD RXC TXC SCTE TXD
D4
R4
R3
R2
R1
MXL1544 MAX3175
D3
D2
D1
R3
R2
R1
MXL1543B
D3
D2
D1 MXL1344A
18 LL A (141)
13 5 10 8 CTS A (106) CTS B DSR A (109) DSR B
22 6 DCD A (107) DCD B
23 20 19 4 DTR A (108) DTR B RTS A (105) RTS B
1 SHIELD (101)
7 SG (102)
16 3 RXD A (104) RXD B
9 17 RXC A (115) RXC B
12 15 11 24 14 2 TXC A (114) TXC B SCTE A (113) SCTE B TXD A (103) TXD B
DB-25 CONNECTOR
________________________________________________________________ Maxim Integrated Products
1
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+5V Multiprotocol, 3Tx/3Rx, SoftwareSelectable Clock/Data Transceivers MXL1543B
ABSOLUTE MAXIMUM RATINGS
All Voltages Referenced to GND Unless Otherwise Noted. Supply Voltages VCC .......................................................................-0.3V to +6V VDD ....................................................................-0.3V to +7.3V VEE.....................................................................+0.3V to -6.5V VDD to VEE (Note 1)................................................................13V Logic Input Voltages M0, M1, M2, DCE/DTE, T_IN ................................-0.3V to +6V Logic Output Voltages R_OUT ....................................................-0.3V to (VCC + 0.3V) Transmitter Outputs T_OUT_, T3OUT_/R1IN_.....................................-15V to +15V Short-Circuit Duration............................................Continuous Note 1: VDD and VEE absolute difference cannot exceed 13V. Receiver Input R_IN_T3OUT_/R1IN_ ..........................................-15V to +15V R_IN A to R_IN B..............................-15V to 0V or 0V to +15V Continuous Power Dissipation (TA = +70C) 28-Pin SSOP (derate 9.5mW/C above +70C) ...........762mW Operating Temperature Range MXL1543BCAI .....................................................0C to 70C Junction Temperature .......................................................150C Storage Temperature Range ...........................-65C to +150C Lead Temperature (soldering, 10s) ...............................+300C
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VCC = +5.0V, C1 = C2 = C4 = 1F, C3 = C5 = 4.7F, (Figure 10), TA = TMIN to TMAX. Typical values are at TA = +25C, unless otherwise noted.)
PARAMETER DC CHARACTERISTICS VCC Operating Range VCC RS-530, RS-530A, X.21, no load Supply Current (DCE Mode) (Digital Inputs = GND or VCC) (Transmitter Outputs Static) RS-530, RS-530A, X.21, full load V.35 mode, no load ICC V.35 mode, full load V.28 mode, no load V.28 mode, full load No-cable mode RS-530, RS-530A, X.21, full load Internal Power Dissipation (DCE Mode) PD V.35 mode, full load V.28 mode, full load Any mode (except no-cable mode), no load Positive Charge-Pump Output Voltage VDD V.28 mode, with load V.28, V.35 modes, with load, IDD = 10mA V.28, V.35, no load Negative Charge-Pump Output Voltage Supply Rise Time Input High Voltage Input Low Voltage Logic Input Current VEE V.28 mode, full load V.35 mode, full load RS-530, RS-530A, X.21, full load tr VIH VIL T1IN, T2IN, T3IN IIN M0, M1, M2, DCE/DTE = GND M0, M1, M2, DCE/DTE = VCC -100 -50 No-cable mode or power-up to turn on 2.0 0.8 10 -30 10 A LOGIC INPUTS (M0, M1, M2, DCE/DTE, T1IN, T2IN, T3IN) V 6.4 6.4 6.4 4.75 13 100 20 126 20 40 0.5 230 600 140 6.8 6.8 6.8 -5.6 -5.6 -5.6 -5.6 500 -5.4 -5.4 -5.4 s V V mW 75 10 A 170 130 mA 5.25 V SYMBOL CONDITIONS MIN TYP MAX UNITS
2
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+5V Multiprotocol, 3Tx/3Rx, SoftwareSelectable Clock/Data Transceivers
ELECTRICAL CHARACTERISTICS (continued)
(VCC = +5.0V, C1 = C2 = C4 = 1F, C3 = C5 = 4.7F, (Figure 10), TA = TMIN to TMAX. Typical values are at TA = +25C, unless otherwise noted.)
PARAMETER Output High Voltage Output Low Voltage Output Short-Circuit Current Output Pullup Current V.11 TRANSMITTER Open-Circuit Differential Output Voltage Loaded Differential Output Voltage Change in Magnitude of Output Differential Voltage Common-Mode Output Voltage Change in Magnitude of Output Common-Mode Voltage Short-Circuit Current Output Leakage Current Rise or Fall Time Transmitter Input to Output Delay Data Skew Output to Output Skew V.11 RECEIVER Differential Threshold Voltage Input Hysteresis Receiver Input Current Receiver Input Resistance Rise or Fall Time Receiver Input to Output Delay Data Skew V.35 TRANSMITTER Differential Output Voltage Output High Current Output Low Current VOD IOH IOL Open circuit (Figure 3) With load, -4V VCM 4V (Figure 3) VA,B = 0 VA,B = 0 0.44 -13 9 0.55 -11 11 7 0.66 -9 13 V mA mA VTH VTH IIN RIN tr, tf tPHL,tPLH
|tPHL- tPLH|
MXL1543B
SYMBOL VOH VOL ISC IL
CONDITIONS ISOURCE = 4mA ISINK = 4mA 0 VOUT VCC VOUT = 0, no-cable mode
MIN 3
TYP 4.5 0.3 70
MAX
UNITS
LOGIC OUTPUTS (R1OUT, R2OUT, R3OUT) 0.8 50 V mA A
VODO
Open circuit, R = 1.95k (Figure 1) R = 50 (Figure 1), TA = +25oC R = 50 (Figure 1) 0.5 VODO 2
5 0.67 VODO
V
VODL
V
VOD VOC VOC ISC IZ tr, tf tPHL , tPLH
ItPHL- tPLHI tSKEW
R = 50 (Figure 1) R = 50 (Figure 1)
0.2 3.0
V V
R = 50 (Figure 1) VOUT = GND -0.25V VOUT +0.25V, power-off or no-cable mode (Figures 2, 6) (Figures 2, 6) (Figures 2, 6) (Figures 2, 6) -7V VCM 7V -7V VCM 7V -10V VA, B 10V -10V VA, B 10V (Figures 2, 7) (Figures 2, 7) (Figures 2, 7) 15 30 15 50 2 -200 15 2 1 10 40 2 3
0.2 150 100 25 80 12
V mA A ns ns ns ns
200 40 0.66
mV mV mA k ns
80 16
ns ns
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+5V Multiprotocol, 3Tx/3Rx, SoftwareSelectable Clock/Data Transceivers MXL1543B
ELECTRICAL CHARACTERISTICS (continued)
(VCC = +5.0V, C1 = C2 = C4 = 1F, C3 = C5 = 4.7F, (Figure 10), TA = TMIN to TMAX. Typical values are at TA = +25C, unless otherwise noted.)
PARAMETER Output Leakage Current Rise or Fall Time Transmitter Input to Output Delay Data Skew Output-to-Output Skew V.35 RECEIVER Differential Input Voltage Input Hysteresis Receiver Input Current Receiver Input Resistance Rise or Fall Time Receiver Input to Output Delay Data Skew V.28 TRANSMITTER Output Voltage Swing (Figure 4) Short-Circuit Current Output Leakage Current Output Slew Rate Transmitter Input to Output Delay Transmitter Input to Output Delay V.28 RECEIVER Input Threshold Low Input Threshold High Input Hysteresis Input Resistance Rise or Fall Time Receiver Input to Output Delay Receiver Input to Output Delay VIL VIH VHYST RIN tr, tf tPHL tPLH -15V VIN +15V (Figures 5, 9) (Figures 5, 9) (Figures 5, 9) 3 0.8 1.2 1.2 0.05 5 15 60 160 100 250 2.0 0.3 7 V V V k ns ns ns VO ISC IZ SR tPHL tPLH -0.25V VOUT +0.25V, power-off or nocable mode RL = 3k, CL = 2500pF (Figures 4, 8) RL = 3k, CL = 2500pF (Figures 4, 8) RL = 3k, CL = 2500pF (Figures 4, 8) 4 1.5 1.5 1 Open circuit RL = 3k 5 6 150 100 30 2.5 3 7 V mA A V/s s s VTH VTH IIN RIN tr, tf
tPHL, tPLH |tPHL-tPLH|
SYMBOL IZ tr, tf tPHL, tPLH
|tPHL-tPLH|
CONDITIONS -0.25V VOUT +0.25V, power-off or nocable mode (Figures 3, 6) (Figures 3, 6) (Figures 3, 6) (Figures 3, 6) -2V VCM 2V (Figure 3) -2V VCM 2V (Figure 3) -10V VA,B 10V -10V VA,B 10V (Figures 3, 7) (Figures 3, 7) (Figures 3, 7)
MIN
TYP 1 5 35 2 4
MAX 100
UNITS A ns
80 16
ns ns ns
tSKEW
-200 15 15 30 15 50 2
200 40 0.66
mV mV mA k ns
80 16
ns ns
4
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+5V Multiprotocol, 3Tx/3Rx, SoftwareSelectable Clock/Data Transceivers MXL1543B
Typical Operating Characteristics
(VCC = +5.0V, C1 = C2 = C4 =1F, C3 = C5 = 4.7F, (Figure 10), TA = TMIN to TMAX, TA = +25C, unless otherwise noted.)
V.11 SUPPLY CURRENT vs. DATA RATE
MXL1543B toc01
V.28 SUPPLY CURRENT vs. DATA RATE
MXL1543B toc02
V.35 SUPPLY CURRENT vs. DATA RATE
180 160 SUPPLY CURRENT (mA) 140 120 100 80 60 40 20 DCE MODE, FULL LOAD, ALL TRANSMITTERS OPERATING AT THE SPECIFIED DATA RATE 0.1 0.1 10 100 1000 10,000
MXL1543B toc03
160 140 SUPPLY CURRENT (mA) 120 100 80 60 40
100 DCE MODE ALL TRANSMITTERS OPERATING AT THE SPECIFIED DATA RATE RL = 3k, CL = 2500pF
200
80 SUPPLY CURRENT (mA)
60
40
20 20 0 0.1 1 10 100 1000 10,000 DATA RATE (kbps) DCE MODE, R = 50, ALL TRANSMITTERS OPERATING AT THE SPECIFIED DATA RATE 0 0 50 100 150 DATA RATE (kbps) 200 250
0 DATA RATE (kbps)
V.11 DRIVER DIFFERENTIAL OUTPUT VOLTAGE vs. TEMPERATURE
MXL1543B toc04
V.28 OUTPUT VOLTAGE vs. TEMPERATURE
8 6 OUTPUT VOLTAGE (V) 4 2 0 -2 -4 -6 -8 -10 VOUTVOUT+ DCE MODE, RL = 3k
MXL1543B toc05
V.35 OUTPUT VOLTAGE vs. TEMPERATURE
DCE MODE, VCM = 0 FULL LOAD VOH
MXL1543B toc06
DRIVER DIFFERENTIAL OUTPUT VOLTAGE (V)
5 4 3 2 1 0 -1 -2 -3 -4 -5 0 10 20 30 40 50 60 VOUTDCE MODE, R = 50 VOUT+
10
0.66 0.44 OUTPUT VOLTAGE (V) 0.22 0 -0.22 -0.44 -0.66
VOL 0 10 20 30 40 50 TEMPERATURE (C) 60 70
70
0
10
20
30
40
50
60
70
TEMPERATURE (C)
TEMPERATURE (C)
V.35 DIFFERENTIAL OUTPUT VOLTAGE vs. COMMON-MODE VOLTAGE
MXL1543B toc07
V.11/V.35 RECEIVER INPUT CURRENT vs. INPUT VOLTAGE
MXL1543B toc08
V.28 RECEIVER INPUT CURRENT vs. INPUT VOLTAGE
2.0 RECEIVER INPUT CURRENT (mA) 1.5 1.0 0.5 0 -0.5 -1.0 -1.5 -2.0 -2.5 DCE MODE
MXL1543B toc09
600 DIFFERENTIAL OUTPUT VOLTAGE (mV) 590 580 570 560 550 540 530 520 -4 -3 -2 -1 0 1 2 3 4 COMMON-MODE VOLTAGE (V) |VOD|
300 DCE MODE RECEIVER INPUT CURRENT (A) 200 100 0 -100 -200 -300 -10 -8 -6 -4 -2 0 2 4 6 8
2.5
10
-10 -8
-6
-4
-2
0
2
4
6
8
10
INPUT VOLTAGE (V)
INPUT VOLTAGE (V)
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+5V Multiprotocol, 3Tx/3Rx, SoftwareSelectable Clock/Data Transceivers MXL1543B
Typical Operating Characteristics (continued)
(VCC = +5.0V, C1= C2 = C4 =1F, C3 = C5 = 4.7F (Figure 10), TA = +25C, unless otherwise noted.)
V.11 LOOPBACK OPERATION
MXL1543B toc10
V.28 LOOPBACK OPERATION
MXL1543B toc11
V.35 LOOPBACK OPERATION
MXL1543B toc12
R = 50 TIN 5V/div TIN
CL = 2500pF RL = 3k
FULL LOAD 5V/div TIN 5V/div
TOUT/RIN
5V/div
TOUT/RIN
5V/div
TOUT/RIN
1V/div
ROUT
5V/div ROUT
5V/div
ROUT
5V/div
200ns/div
1s/div
200ns/div
V.28 SLEW RATE vs. CLOAD
MXL1543B toc13
V.11 TRANSMITTER PROPAGATION DELAY vs. TEMPERATURE
MXL1543B toc14
V.11 RECEIVER PROPAGATION DELAY vs. TEMPERATURE
70 PROPAGATION DELAY (ns) 60 50 40 30 20 10 0 tPLH tPHL
MXL1543B toc15
24 22 20 18 16 14 12 10 8 6 4 2 0 0
80 70 PROPAGATION DELAY (ns) 60 50 40 30 20 10 0 0 10 20 50 40 TEMPERATURE (C) 30 60 tPHL tPLH
80
SLEW RATE (V/s)
+SLEW -SLEW
RL = 3k 1 TRANSMITTER SWITCHING AT 250kbps. OTHER TRANSMITTERS SWITCHING AT 15kbps 1000 2000 3000 4000 5000
70
0
10
20
CLOAD (pF)
30 50 40 TEMPERATURE (C)
60
70
V.35 TRANSMITTER PROPAGATION DELAY vs. TEMPERATURE
MXL1543B toc16
V.35 RECEIVER PROPAGATION DELAY vs. TEMPERATURE
90 80 PROPAGATION DELAY (ns) 70 60 50 40 30 20 10 0 tPLH tPHL
MXL1543B toc17
80 70 PROPAGATION DELAY (ns) 60 50 40 30 20 10 0 0 10 20 50 40 TEMPERATURE (C) 30 60 tPHL tPLH
100
70
0
10
20
30 50 40 TEMPERATURE (C)
60
70
6
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+5V Multiprotocol, 3Tx/3Rx, SoftwareSelectable Clock/Data Transceivers MXL1543B
Test Circuits
100pF R VOD D B 100 A A 15pF VOC B R
R
100pF
Figure 1. V.11 DC Test Circuit
Figure 2. V.11 AC Test Circuit
50 D B VOD A 50 125 VCM 125
50 B R
50
A 15pF
Figure 3. V.35 Transmitter/Receiver Test Circuit
D
A
D
A
R
VO CL
RL
15pF
Figure 4. V.28 Driver Test Circuit
Figure 5. V.28 Receiver Test Circuit
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7
+5V Multiprotocol, 3Tx/3Rx, SoftwareSelectable Clock/Data Transceivers MXL1543B
Timing Diagrams
5V D 0 V0 B--A -V0 A V0 B tSKEW tSKEW 50% tr 1.5V tPLH 90% 10% VDIFF = V(A) - V(B) 1/2 V0 f = 1MHz: tr 10ns: tf 10ns
1.5V tPHL 90% tf 50% 10%
Figure 6. V.11, V.35 Driver Propagation Delays
V0 B--A -V0 V0H R V0L
0 tPLH 1.5V
f = 1MHz: tr 10ns: tf 10ns
INPUT
0 tPHL
OUTPUT
1.5V
Figure 7. V.11, V.35 Receiver Propagation Delays
3V D 0 V0 3V A -V0 tr 0 -3V -3V tr 0 1.5V tPHL 1.5V tPLH 3V
Figure 8. V.28 Driver Propagation Delays
VIH A VIL V0H R V0L 1.3V tPHL 0.8V 1.7V tPLH 2.4V
Figure 9. V.28 Receiver Propagation Delays
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+5V Multiprotocol, 3Tx/3Rx, SoftwareSelectable Clock/Data Transceivers
Pin Description
PIN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 NAME C1C1+ VDD VCC T1IN T2IN T3IN R1OUT R2OUT R3OUT M0 M1 M2 DCE/DTE R3INB R3INA R2INB R2INA T3OUTB/R1INB T3OUTA/R1INA T2OUTB T2OUTA T1OUTB T1OUTA GND VEE C2C2+ FUNCTION Capacitor C1 Negative Terminal. Connect a 1F ceramic capacitor between C1+ and C1-. Capacitor C1 Positive Terminal. Connect a 1F ceramic capacitor between C1+ and C1-. Generated Positive Supply. Connect a 4.7F ceramic capacitor to ground. +5V Supply Voltage (5%). Decouple with a 1F capacitor to ground. Transmitter 1 TTL-Compatible Input Transmitter 2 TTL-Compatible Input Transmitter 3 TTL-Compatible Input Receiver 1 CMOS Output Receiver 2 CMOS Output Receiver 3 CMOS Output Mode-Select Pin with Internal Pullup to VCC Mode-Select Pin with Internal Pullup to VCC Mode-Select Pin with Internal Pullup to VCC DCE/DTE Mode-Select Pin with Internal Pullup to VCC Noninverting Receiver Input Inverting Receiver Input Noninverting Receiver Input Inverting Receiver Input Noninverting Transmitter Output/Noninverting Receiver Input Inverting Transmitter Output/Inverting Receiver Input Noninverting Transmitter Output Inverting Transmitter Output Noninverting Transmitter Output Inverting Transmitter Output Ground Generated Negative Supply. Connect a 4.7F ceramic capacitor to ground. Capacitor C2 Negative Terminal. Connect a 1F ceramic capacitor between C2+ and C2-. Capacitor C2 Positive Terminal. Connect a 1F ceramic capacitor between C2+ and C2-.
MXL1543B
Detailed Description
The MXL1543B is a three-driver/three-receiver, multiprotocol transceiver that operates from a single +5V supply. The MXL1543B, along with the MXL1544/MAX3175 and MXL1344A, form a complete software-selectable DTE or DCE interface port that supports the V.28 (RS-232), V.10/V.11 (RS-449/V.36, EIA-530, EIA-530A, X.21), and V.35 protocols. The MXL1543B transceivers carry the high-speed clock and data signals, while the MXL1544/MAX3175 transceivers carry serial interface control signaling. The MXL1543B can be terminated by the MXL1344A software-selectable resistor termination network or by a discrete termination network. The MXL1543B features a 0.5A no-cable mode, true fail-safe
operation, and thermal shutdown circuitry. Thermal shutdown protects the drivers against excessive power dissipation. When activated, the thermal shutdown circuitry places the driver outputs into a high-impedance state.
Mode Selection
The state of the mode-select pins M0, M1, and M2 determines which serial interface protocol is selected (Table 1). The state of the DCE/DTE input determines whether the transceiver will be configured as a DTE or DCE serial port. When the DCE/DTE input is logic HIGH, driver T3 is activated and receiver R1 is disabled. When the DCE/DTE input is logic LOW, driver T3 is disabled and receiver R1 is activated. M0, M1, M2,
9
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+5V Multiprotocol, 3Tx/3Rx, SoftwareSelectable Clock/Data Transceivers MXL1543B
Table 1. Mode Selection
MXL1543B MODE NAME Not Used (Default V.11) RS-530A RS-530 X.21 V.35 RS-449/V.36 V.28/RS-232 No Cable Not Used (Default V.11) RS-530A RS-530 X.21 V.35 RS-449/V.36 V.28/RS-232 No Cable M2 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 M1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 M0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 DCE/ DTE 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 T1 V.11 V.11 V.11 V.11 V.35 V.11 V.28 Z V.11 V.11 V.11 V.11 V.35 V.11 V.28 Z T2 V.11 V.11 V.11 V.11 V.35 V.11 V.28 Z V.11 V.11 V.11 V.11 V.35 V.11 V.28 Z T3 Z Z Z Z Z Z Z Z V.11 V.11 V.11 V.11 V.35 V.11 V.28 Z R1 V.11 V.11 V.11 V.11 V.35 V.11 V.28 Z Z Z Z Z Z Z Z Z R2 V.11 V.11 V.11 V.11 V.35 V.11 V.28 Z V.11 V.11 V.11 V.11 V.35 V.11 V.28 Z R3 V.11 V.11 V.11 V.11 V.35 V.11 V.28 Z V.11 V.11 V.11 V.11 V.35 V.11 V.28 Z
and DCE/DTE are internally pulled up to VCC to ensure a logic HIGH if left unconnected.
No-Cable Mode
The MXL1543B will enter no-cable mode when the mode-select pins are left unconnected or connected high (M0 = M1 = M2 = 1). In this mode, the multiprotocol drivers and receivers are disabled and the supply current drops to 0.5A. The receivers' outputs enter a high-impedance state in no-cable mode, which allow these output lines to be shared with other receivers' outputs (the receivers' outputs have internal pullup resistors to pull the outputs HIGH if not driven). Also, in no-cable mode, the transmitter outputs enter a highimpedance state so that these output lines can be shared with other devices.
and a reservoir capacitor (C3, C5) to generate the VDD and VEE supplies. Figure 10 shows charge-pump connections.
Fail-Safe Receivers
The MXL1543B guarantees a logic-high receiver output when the receiver inputs are shorted or open, or when they are connected to a terminated transmission line with all the drivers disabled. This is done by setting the receivers' threshold between -25mV and -200mV in the V.11 and V.35 modes. If the differential receiver input
MXL1543B
C3 4.7F C1 1F 5V VDD C1+ C1VCC C2+ C2VEE GND C2 1F
Dual Charge-Pump Voltage Converter
The MXL1543B's internal power supply consists of a regulated dual charge pump that provides positive and negative output voltages from a +5V supply. The charge pump operates in discontinuous mode. If the output voltage is less than the regulated voltage, the charge pump is enabled. If the output voltage exceeds the regulated voltage, the charge pump is disabled. Each charge pump requires a flying capacitor (C1, C2)
C5 4.7F
C4 1F
Figure 10. Charge Pump
10
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+5V Multiprotocol, 3Tx/3Rx, SoftwareSelectable Clock/Data Transceivers MXL1543B
C6 C7 C8 100pF 100pF 100pF
3 VCC 5V 14 3 C3 4.7F C1 1F C4 1F DTE_TXD/DCE_RXD DTE_SCTE/DCE_RXC 5 6 7 DTE_TXC/DCE_TXC DTE_RXC/DCE_SCTE DTE_RXD/DCE_TXD 8 9 10 D1 D2 D3 R1 R2 R3 20 19 18 17 16 15 1 2 4 CHARGE PUMP 28 27 26 25 24 23 22 21 C2 1F 2 C5 4.7F C13 1F VCC
8
11
12 13 MXL1344A
LATCH DCE/DTE M2
21
M1
C12 1F
54
67
9 10 16 15 18 17 19 20 22 23 24 1 VCC
M0
VEE
DTE 2 TXD A 14 TXD B 24 SCTE A 11 SCTE B 15 12 17 9 3 16 7
DCE RXD A RXD B RXC A RXC B
TXC A TXC B
TXC A TXC B
RXC A SCTE A RXC B SCTE B RXD A TXD A RXD B TXD B SG
11
NC
M0 MXL1543B 12 M1 13 M2 14 DCE/DTE
1
SHIELD
DB-25 CONNECTOR C9 1F C10 1F VCC 1 28 VCC VDD VEE GND 27 C11 1F 25 DCE/DTE 21 M1 18 M0 4 RTS A CTS A 19 RTS B CTS B 20 DTR A DSR A 23 DTR B DSR B 8 DCD A 10 DCD B 6 DSR A 22 DSR B 5 CTS A 13 CTS B
2
DTE_RTS/DCE_CTS DTE_DTR/DCE_DSR
3 4 5
D1 D2 D3 R1 R2 R3 R4 D4
26 25 24 23
DTE_DCD/DCE_DCD DTE_DSR/DCE_DTR DTE_CTS/DCE_RTS
6 7 8 10 9 11 12 NC
22 21 20 19 18 17 16
DCD A DCD B DTR A DTR B RTS A RTS B
M0 MXL1544 MAX3175 M1 13 M2 14 15 DCE/DTE INVERT
Figure 11. Cable-Selectable Multiprotocol DTE/DCE Port
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11
+5V Multiprotocol, 3Tx/3Rx, SoftwareSelectable Clock/Data Transceivers MXL1543B
GENERATOR BALANCED INTERCONNECTING CABLE IZ LOAD CABLE TERMINATION A A +3V 100 MIN B C GND B C GND RECEIVER -10V -3V VZ +10V 3.25mA
-3.25mA
Figure 13. Receiver Input Impedance
Figure 12. Typical V.11 Interface
voltage (B - A) is -25mV, R_OUT is logic HIGH. If (B A) is -200mV, R_OUT is logic LOW. In the case of a terminated bus with all transmitters disabled, the receiver's differential input voltage is pulled to zero by the termination. With the receiver thresholds of the MXL1543B, this results in a logic HIGH with a 25mV minimum noise margin.
DCE/DTE are wired to the DB-25 connector. To select the serial interface mode, the appropriate combination of M0, M1, and DCE/DTE are grounded within the cable wiring. The control lines that are not grounded are pulled high by the internal pullups on the MXL1543B. The serial interface protocol of the MXL1543B, MXL1544/MAX3175, and MXL1344A is selected based on the cable that is connected to the DB-25 interface.
V.11 Interface
As shown in Figure 12, the V.11 protocol is a fully balanced differential interface. The V.11 driver generates a minimum of 2V between nodes A and B when a 100 (min) resistance is presented at the load. The V.11 receiver is sensitive to 200mV differential signals at receiver inputs A' and B'. The V.11 receiver rejects common-mode signals developed across the cable (referenced from C to C') of up to 7V, allowing for error-free reception in noisy environments. The receiver inputs must comply with the impedance curve shown in Figure 13. For high-speed data transmission, the V.11 specification recommends terminating the cable at the receiver with a 100 resistor. This resistor, although not required, prevents reflections from corrupting transmitted data. In Figure 14, the MXL1344A is used to terminate the V.11 receiver. Internal to the MXL1344A, S1 is closed and S2 is open to present a 100 minimum differential resistance. The MXL1543B's internal V.28 termination is disabled by opening S3.
Applications Information
Capacitor Selection
The capacitors used for the charge pumps, as well as for supply bypassing, should have a low equivalent series resistance (ESR) and low temperature coefficient. Multilayer ceramic capacitors with an X7R dielectric offer the best combination of performance, size, and cost. The flying capacitors (C1, C2) and the bypass capacitor (C4) should have a value of 1F, while the reservoir capacitors (C3, C5) should have a minimum value of 4.7F (Figure 10). To reduce the ripple present on the transmitter outputs, capacitors C3, C4, and C5 can be increased. The values of C1 and C2 should not be increased.
Cable Termination
The MXL1344A software-selectable resistor network is designed to be used with the MXL1543B. The MXL1344A multiprotocol termination network provides V.11- and V.35-compliant termination, while V.28 receiver termination is internal to the MXL1543B. These cable termination networks provide compatibility with V.11, V.28, and V.35 protocols. Using the MXL1344A termination networks provide the advantage of not having to build expensive termination networks out of resistors and relays, manually changing termination modules, or building custom termination networks
V.35 Interface
Figure 15 shows a fully-balanced, differential standard V.35 interface. The generator and the load must both present a 100 10 differential impedance and a 150 15 common-mode impedance as shown by the resistive T networks in Figure 15. The V.35 driver generates a current output (11mA, typ) that develops an output voltage of 550mV across the generator and load termination networks. The V.35 receiver is sensitive to 200mV differential signals at receiver inputs A' and B'. The V.35 receiver rejects common-mode sig-
Cable-Selectable Mode
A cable-selectable multiprotocol interface is shown in Figure 11. The mode control lines M0, M1, and
12
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+5V Multiprotocol, 3Tx/3Rx, SoftwareSelectable Clock/Data Transceivers MXL1543B
A A R5 12k R1 52
MXL1543B
MXL1344A
R8 5k
R6 12k
RECEIVER
S1 S2 R3 124
S3
R2 52 B B R4 12k
R7 12k
C GND
Figure 14. V.11 Termination and Internal Resistance Networks
GENERATOR
BALANCED INTERCONNECTING CABLE A A CABLE TERMINATION
LOAD RECEIVER
50
125
125
50
50 B C GND B C GND
50
Figure 15. Typical V.35 Interface
A
A R5 12k R1 52
MXL1543B
MXL1344A
R8 5k
R6 12k
RECEIVER
S1 S2 R3 124
S3
R2 52 B B R4 12k
R7 12k
C GND
Figure 16. V.35 Termination and Internal Resistance Networks
______________________________________________________________________________________
13
+5V Multiprotocol, 3Tx/3Rx, SoftwareSelectable Clock/Data Transceivers MXL1543B
GENERATOR UNBALANCED INTERCONNECTING CABLE CABLE TERMINATION LOAD RECEIVER
A
A
C GND
C GND
Figure 17. Typical V.28 Interface
A
A R5 12k R1 52
MXL1543B
MXL1344A
R8 5k
R6 12k
RECEIVER
S1 S2 R3 124
S3
R2 52 B B R4 12k
R7 12k
C GND
Figure 18. V.28 Termination and Internal Resistance Networks
nals developed across the cable (referenced from C to C') of up to 4V, allowing for error-free reception in noisy environments. In Figure 16, the MXL1344A is used to implement the resistive T network that is needed to properly terminate the V.35 driver and receiver. Internal to the MXL1344A, S1 and S2 are closed to connect the T-network resistors to the circuit. The V.28 termination resistor (internal to the MXL1543B) is disabled by opening S3 to avoid interference with the T-network impedance.
Figure 18 shows the MXL1344A's termination network disabled by opening S1 and S2. The MXL1543B's internal 5k V.28 termination is enabled by closing S3.
DTE vs. DCE Operation
Figure 19 shows a DCE or DTE controller-selectable interface. DCE/DTE (pin 14) switches the port's mode of operation. See Table 1. This application requires only one DB-25 connector, but separate cables for DCE or DTE signal routing. See Figure 19 for complete signal routing in DCE and DTE modes.
V.28 Interface
The V.28 interface is an unbalanced single-ended interface (Figure 17). The V.28 driver generates a minimum of 5V across a 3k load impedance between A' and C'. The V.28 receiver has a single-ended input. To aid in rejecting system noise, the MXL1543B's V.28 receiver has a typical hysteresis of 0.05V.
Complete Multiprotocol X.21 Interface
A complete DTE-to-DCE interface operating in X.21 mode is shown in Figure 20. The MXL1543B is used to generate the clock and data signals, and the MXL1544/MAX3175 generate the control signals and
14
______________________________________________________________________________________
+5V Multiprotocol, 3Tx/3Rx, SoftwareSelectable Clock/Data Transceivers MXL1543B
C6 C7 C8 100pF 100pF 100pF
3 VCC 5V 14 3 C3 4.7F C1 1F C4 1F DTE_TXD/DCE_RXD DTE_SCTE/DCE_RXC 5 6 7 DTE_TXC/DCE_TXC DTE_RXC/DCE_SCTE DTE_RXD/DCE_TXD 8 9 10 D1 D2 D3 R1 R2 R3 20 19 18 17 16 15 1 2 4 CHARGE PUMP 28 27 26 25 24 23 22 21 C2 1F 2 C5 4.7F C13 1F VCC
8
11
12 13 MXL1344A
LATCH DCE/DTE M2 M1
21
C12 1F
54
67
9 10 16 15 18 17 19 20 22 23 24 1 DTE 2 TXD A 14 TXD B 24 SCTE A 11 SCTE B 15 12 17 9 3 16 7 DCE RXD A RXD B RXC A RXC B
M0
VEE
TXC A TXC B
TXC A TXC B
RXC A SCTE A RXC B SCTE B RXD A TXD A RXD B TXD B SG
11
M0 MXL1543B 12 M1 13 M2 14 DCE/DTE
1
SHIELD
DB-25 CONNECTOR C9 1F C10 1F VCC 1 28 VCC VDD VEE GND 27 C11 1F
2
DTE_RTS/DCE_CTS DTE_DTR/DCE_DSR
3 4 5
D1 D2 D3 R1 R2 R3 R4 D4
26 25 24 23
4 RTS A 19 RTS B 20 DTR A 23 DTR B 8 DCD A 10 DCD B 6 DSR A 22 DSR B 5 CTS A 13 CTS B 18 LLA
CTS A CTS B DSR A DSR B
DTE_DCD/DCE_DCD DTE_DSR/DCE_DTR DTE_CTS/DCE_RTS DTE_LL/DCE_LL
6 7 8 10 9
22 21 20 19 18 17 16
DCD A DCD B DTR A DTR B RTS A RTS B LLA
MXL1544 M0 MAX3175 12 15 M1 INVERT 13 M2 14 DCE/DTE 11 DCE/DTE M2 M1 M0
Figure 19. Multiprotocol DCE/DTE Port
______________________________________________________________________________________
15
+5V Multiprotocol, 3Tx/3Rx, SoftwareSelectable Clock/Data Transceivers MXL1543B
DTE SERIAL CONTROLLER TXD SCTE
MXL1543B MXL1344A MXL1344A
DCE
MXL1543B
SERIAL CONTROLLER TXD SCTE
D1 D2 D3
TXD SCTE
104 104
R3 R2 R1
TXC RXC
R3 R2
104 104
TXC RXC RXD
D1 D2
TXC RXC
RXD
R1
104
D3
RXD
MXL1544 MAX3175
MXL1544 MAX3175
RTS DTR
D1 D2 D3
RTS DTR
R3 R2 R1
RTS DTR
DCD DSR CTS LL
R1 R2 R3 D4 R4
DCD DSR CTS LL
D3 D2 D1 R4 D4
DCD DSR CTS LL
Figure 20. DCE-to-DTE X.21 Interface
local loopback (LL). The MXL1344A is used to terminate the clock and data signals to support the V.11 protocol for cable termination. The control signals do not need external termination.
Compliance Testing
A European Standard EN 45001 test report is pending for the MXL1543B/MXL1544/MXL1344A chipset. A copy of the test report will be available from Maxim upon completion.
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+5V Multiprotocol, 3Tx/3Rx, SoftwareSelectable Clock/Data Transceivers
Chip Information
TRANSISTOR COUNT: 2619 PROCESS: BiCMOS
TOP VIEW
C1- 1 C1+ 2 VDD 3 VCC 4 T1IN 5 T2IN 6 T3IN 7 R1OUT 8 R2OUT 9 R3OUT 10 M0 11 M1 12 M2 13 DCE/DTE 14 28 C2+ 27 C226 VEE 25 GND 24 T1OUTA
Pin Configuration
MXL1543B
MXL1543B
23 T1OUTB 22 T2OUTA 21 T2OUTB 20 T3OUTA/R1INA 19 T3OUTB/R1INB 18 R2INA 17 R2INB 16 R3INA 15 R3INB
SSOP
______________________________________________________________________________________
17
+5V Multiprotocol, 3Tx/3Rx, SoftwareSelectable Clock/Data Transceivers MXL1543B
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.)
SSOP.EPS
2
1
INCHES DIM A A1 B C E H D E e H L MIN 0.068 0.002 0.010 MAX 0.078 0.008 0.015
MILLIMETERS MIN 1.73 0.05 0.25 MAX 1.99 0.21 0.38 D D D D D INCHES MIN 0.239 0.239 0.278 0.317 0.397 MAX 0.249 0.249 0.289 0.328 0.407 MILLIMETERS MIN 6.07 6.07 7.07 8.07 10.07 MAX 6.33 6.33 7.33 8.33 10.33 N 14L 16L 20L 24L 28L
0.20 0.09 0.004 0.008 SEE VARIATIONS 0.205 0.301 0.025 0 0.212 0.311 0.037 8 5.20 7.65 0.63 0 5.38 7.90 0.95 8 0.0256 BSC 0.65 BSC
N
A C B e D A1 L
NOTES: 1. D&E DO NOT INCLUDE MOLD FLASH. 2. MOLD FLASH OR PROTRUSIONS NOT TO EXCEED .15 MM (.006"). 3. CONTROLLING DIMENSION: MILLIMETERS. 4. MEETS JEDEC MO150. 5. LEADS TO BE COPLANAR WITHIN 0.10 MM.
PROPRIETARY INFORMATION TITLE:
PACKAGE OUTLINE, SSOP, 5.3 MM
APPROVAL DOCUMENT CONTROL NO. REV.
21-0056
1 1
C
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
18 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 (c) 2004 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.

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